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Espressif Systems /ESP32-S2 /SYSTIMER /INT_CLR

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Interpret as INT_CLR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TARGET0_INT_CLR)TARGET0_INT_CLR 0 (TARGET1_INT_CLR)TARGET1_INT_CLR 0 (TARGET2_INT_CLR)TARGET2_INT_CLR

Description

System timer interrupt clear

Fields

TARGET0_INT_CLR

Interrupt clear bit of system timer target 0.
TARGET1_INT_CLR

Interrupt clear bit of system timer target 1.
TARGET2_INT_CLR

Interrupt clear bit of system timer target 2.

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data